See Thesis for reasons of restrictions and analyzes

1. Entity, architecture declarations

- quantities and IN/OUT/INOUT ports of either type REAL, or REAL_VECTOR(size) are supported
	- main entity's vector ports (IN, OUT, INOUT) are of REAL_VECTOR(size)
		- Even there is a possibility to check size of IN ports from Simulink,
		it complicates existing framework a lot, because Simulink restricts
		order of initialisation actions. It was tested, see Thesis.
        - IN ports can't be changed in entity for efficiency reasons
        - vector ports of instantiated entities can be REAL_VECTOR or REAL_VECTOR(size)
	- inout ports are not at RT, however we implement them. They appear in Simulink
		 2 times, as both input and output ports.

- internal and OUT/INOUT port quantities, both of REAL and REAL_VECTOR(size)
  can be integrated via 'DOT - first order only

	- REAL_VECTOR(size) vector quantities or OUT/inout ports can be integrated as whole
		 only, no by items. However, other vector ports or quantites can be accessed
		 by items. Fields are indexed from 0 to size-1 onlyby VHDL array operator ()

		OutputVector'DOT == StateVector + InputVector;  --- OK
		OutputVector(1)'DOT == 2.35;                    --- BAD
		OutputVector'DOT(1) == 2.35;                    --- BAD

- default generic and port values, ordered or named mapping

2. REAL_VECTOR
	- type REAL_VECTOR(start TO end) is not supported
        - vector literals
	+, -, *, / operations with REAL argument performed on each vector's item
	+, - operations on two REAL_VECTORS
	* for two REAL_VECTORS not supported, as Simulink doesn't allow use of matrices

	REAL can be assigned to REAL_VECTOR, then it's assigned to all its items

   'HIGH, 'LOW, 'LEFT, 'RIGHT

3. component_instantiation_statement with generic and port mapping

4. BREAK quantity=>inital_value ...
   BREAK WHEN s'Above(value) -- not needed for this approach, so accepted and thrown away
   BREAK FOR not_needed_quantity USE quantity=>value WHEN .. --transformed to conditional IF
   BREAK ON s'Above(0.0) -- not needed, accepted and thrown away

   Initial break expressions can use port quantities.

5. simple_simultaneous_statement assumed as assignment, rather than equation

6. simltaneous_if_statement IF .. USE .. ELSIF .. ELSIF .. ELSE ..

7. generate_statement - 'FOR' version only

8. 'ABOVE for REAL